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K6R4016V1C - 256Kx16 Bit High Speed Static RAM

General Description

The K6R4016V1C is a 4,194,304-bit high-speed Static Random Access Memory organized as 262,144 words by 16 bits.

The K6R4016V1C uses 16 common input and output lines and has an output enable pin which operates faster than address access time at read cycle.

Key Features

  • Fast Access Time 10,12,15ns(Max. ).
  • Low Power Dissipation Standby (TTL) : 60mA(Max. ) (CMOS) : 10mA(Max. ) 1.2mA(Max. ) L-Ver. only Operating K6R4016V1C-10 : 160mA(Max. ) K6R4016V1C-12 : 150mA(Max. ) K6R4016V1C-15 : 140mA(Max. ).
  • Single 3.3 ±0.3V Power Supply.
  • TTL Compatible Inputs and Outputs.
  • Fully Static Operation - No Clock or Refresh required.
  • Three State Outputs.
  • 2V Minimum Data Retention : L-Ver. only.
  • Center Power/Ground P.

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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www.DataSheet4U.com PRELIMPreliminaryPPPPPPPPPINARY CMOS SRAM K6R4016V1C-C/C-L, K6R4016V1C-I/C-P Document Title 256Kx16 Bit High Speed Static RAM(3.3V Operating). Operated at Commercial and Industrial Temperature Ranges. Revision History Rev No. Rev. 0.0 Rev. 1.0 History Initial release with Preliminary. 1.1 Removed Low power Version. 1.2 Removed Data Retention Characteristics. 1.3 Changed ISB1 to 20mA Relax D.C parameters. Item ICC 12ns 15ns 20ns Previous 180mA 175mA 170mA Current 200mA 195mA 190mA Mar. 27. 2000 Final Draft Data Feb. 12. 1999 Mar. 29. 1999 Remark Preliminary Preliminary Rev. 2.0 Aug. 19. 1999 Preliminary Rev. 3.0 3.1 Delete Preliminary 3.2 Update D.C parameters and 10ns part.