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K4M56323PG-C Datasheet 2M x 32Bit x 4 Banks Mobile SDRAM

Manufacturer: Samsung Semiconductor

Download the K4M56323PG-C datasheet PDF. This datasheet also includes the K4M56323PG-F variant, as both parts are published together in a single manufacturer document.

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Note: The manufacturer provides a single datasheet file (K4M56323PG-F_Samsungsemiconductor.pdf) that lists specifications for multiple related part numbers.

General Description

The K4M56323PG is 268,435,456 bits synchronous high data rate Dynamic RAM organized as 4 x 2,097,152 words by 32 bits, fabricated with SAMSUNG’s high performance CMOS technology.

Synchronous design allows precise cycle control with the use of system clock and I/O transactions are possible on every clock cycle.

Range of operating frequencies, programmable burst lengths and programmable latencies allow the same device to be useful for a variety of high bandwidth and high performance memory system applications.

Overview

K4M56323PG-F(H)E/G/C/F 2M x 32Bit x 4 Banks Mobile SDRAM in 90FBGA.

Key Features

  • 1.8V power supply.
  • LVCMOS compatible with multiplexed address.
  • Four banks operation.
  • MRS cycle with address key programs. -. CAS latency (1, 2 & 3). -. Burst length (1, 2, 4, 8 & Full page). -. Burst type (Sequential & Interleave).
  • EMRS cycle with address key programs.
  • All inputs are sampled at the positive going edge of the system clock.
  • Burst read single-bit write operation.
  • Special Function Support. -. PASR (Parti.

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