STR750FV0 Datasheet | STMicroelectronics

Features - Core - ARM7TDMI-S 32-bit RISC CPU - 54 DMIPS @ 60 MHz - Memories - Up to 256 KB Flash program memory (10k W/E cycles, retention 20 yrs @ 85°C) - 16 KB Read-While-Write Flash for data (100k W/E cycles, retention 20 yrs@ 85°C) - Flash Data Readout and Write Protection - 16KBytes embedded high speed SRAM - Memory mapped interface (SMI) to ext. Serial Flash (64 MB) w. boot capability - Clock, reset and supply management - Single supply 3.3V ±10% or 5V ±10% - Embedded 1.8V Voltage Regulators - Int. RC for fast start-up and backup clock - Up to 60 MHz operation using internal PLL with 4 or 8 MHz crystal/ceramic osc. - Smart Low Power Modes: SLOW, WFI, STOP and STANDBY with backup registers - Real-time Clock, driven by low power internal RC or 32.768 k Hz dedicated osc, for clock-calendar and Auto Wake-up - Nested interrupt controller - Fast interrupt handling with 32 vectors - 16 IRQ priorities, 2 maskable FIQ sources - 16 external interrupt / wake-up lines - DMA - 4-channel DMA controller - Circular buffer management - Support for UART, SSP, Timers, ADC - 6 Timers - 16-bit watchdog timer (WDG) - 16-bit timer for system timebase functions - 3 synchronizable timers each with up to 2 input captures and 2 output pare/PWMs. LQFP64 10x10 mm LQFP100 14 x 14 mm LFBGA64 8 x 8 x 1.7 mm LFBGA100 10 x 10 x 1.7 mm - 16-bit 6-ch. synchronizable PWM timer - Dead time generation, edge/center-aligned waveforms and emergency stop - Ideal for induction/brushless DC motors - 8 munications interfaces - 1 I2C interface - 3 Hi Speed UARTs w. Modem/LIN capability - 2 SSP interfaces (SPI or SSI) up to 16 Mb/s - 1 CAN interface (2.0B...