STPMIC1APQR management equivalent, highly integrated power management.
* Input voltage range from 2.8 V to 5.5 V
* 4 adjustable general purpose LDOs
* 1 LDO for DDR3 termination (sink-source), bypass mode for low power DDR or
as .
* I²C and digital IO control interface
* WFQFN 44L (5x6x0.8)
Applications
* Power management for embedded mi.
The STPMIC1 is a fully integrated power management IC designed for products based on high integrated application processor designs requiring low power and high efficiency. The device integrates advanced low power features controlled by a host process.
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