* Core
  – Max fCPU: up to 24 MHz, 0 wait states @ fCPU ≤ 16 MHz
  – Advanced STM8 core with Harvard architecture and 3-stage pipeline

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Product overview . . . . . . . . . . . . . ..

STM8S207K6

STM8S207K8

STM8S207C6

STM8S207C8

STM8S207CB

STM8S207M8

STM8S207MB

STM8S207R6

STM8S207R8

STM8S207RB

STM8S207S6

STM8S207S8

STM8S207SB

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