Includes ST state-of-the-art patented technology Core
* 32-bit Arm® Cortex®-M7 CPU with DP-FPU, L1 cache: 32-Kbyte data cache and 32-Kbyte instruction cache allowing.

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 3 Functional overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 3.1 Arm® Cortex®-M7 with FPU . . . . . . . .

STM32H725AE

STM32H725IE

STM32H725IG

STM32H725RE

STM32H725RG

STM32H725VE

STM32H725VG

STM32H725ZE

STM32H725ZG

STM32H723VE

STM32H723VG

STM32H723ZE

STM32H723ZG

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