STM32F401VB
STM32F401VB is ARM Cortex-M4 32b MCU+FPU manufactured by STMicroelectronics.
- Part of the STM32F401CB comparator family.
- Part of the STM32F401CB comparator family.
Features
- Core: ARM® 32-bit Cortex®-M4 CPU with FPU, Adaptive real-time accelerator (ART Accelerator™) allowing 0-wait state execution from Flash memory, frequency up to 84 MHz, memory protection unit, 105 DMIPS/ 1.25 DMIPS/MHz (Dhrystone 2.1), and DSP instructions
- Memories
- Up to 256 Kbytes of Flash memory
- Up to 64 Kbytes of SRAM
- Clock, reset and supply management
- 1.7 V (PDR OFF) or 1.8 V (PDR ON) to 3.6 V application supply and I/Os
- POR, PDR, PVD and BOR
- 4-to-26 MHz crystal oscillator
- Internal 16 MHz factory-trimmed RC
- 32 k Hz oscillator for RTC with calibration
- Internal 32 k Hz RC with calibration
- Power consumption
- Run: 137 µA/MHz (peripheral off)
- Stop (Flash in Stop mode, fast wakeup time): 42 µA typ @ 25 °C; 65 µA max @25 °C
- Stop (Flash in Deep power down mode, slow wakeup time): down to 10 µA typ@ 25 °C; 28 µA max @25 °C
- Standby: 2.4 µA @25 °C / 1.7 V without RTC; 12 µA @85 °C @1.7 V
- VBAT supply for RTC: 1 µA @25 °C
- 1×12-bit, 2.4 MSPS A/D converter: up to 16 channels
- General-purpose DMA: 16-stream DMA controllers with FIFOs and burst support
- Up to 11 timers: up to six 16-bit, two 32-bit timers up to 84 MHz, each with up to 4 IC/OC/PWM or pulse counter and quadrature (incremental) encoder input, two watchdog timers (independent and window) and a Sys Tick timer
WLCSP49 (3 x 3 mm)
UFQFPN48 (7 × 7 mm)
LQFP100 (14 × 14 mm) LQFP64 (10 × 10 mm)
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UFBGA100 (7 x 7 mm)
- Debug mode
- Serial wire debug (SWD) & JTAG interfaces
- Cortex-M4 Embedded Trace Macrocell™
- Up to 81 I/O ports with interrupt capability
- All IO ports 5 V tolerant
- Up to 78 fast I/Os up to 42 MHz
- Up to 11 munication interfaces
- Up to 3 × I2C interfaces (1Mbit/s, SMBus/PMBus)
- Up to 3 USARTs (2 x 10.5 Mbit/s, 1 x 5.25 Mbit/s), ISO 7816 interface, LIN, Ir DA, modem control)
- Up to 4 SPIs (up to 42 Mbits/s at f CPU = 84 MHz), SPI2 and SPI3 with muxed fullduplex I2S to achieve audio class accuracy via internal audio PLL or external clock
- SDIO interface
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