STI10NM60N Datasheet | STMicroelectronics

Features )1 2 3 t(s I2PAK roduc Figure 1. Internal schematic diagram te P'7$% - Obsole- roduct(s)6 $0Y Order code STI10NM60N RDS(on) @TJmax max. 650 V < 0.55 Ω ID 10 A PTOT 70 W - 100% avalanche tested - Low input capacitance and gate charge - Low gate input resistance Applications - Switching applications Description This device is an N-channel Power MOSFET developed using the second generation of MDmesh™ technology. This revolutionary Power MOSFET associates a vertical structure to the pany’s strip layout to yield one of the world’s lowest on-resistance and gate charge. It is therefore suitable for the most demanding high efficiency converters. olete POrder code Obs STI10NM60N Table 1. Device summary Marking Package 10NM60N I²PAK Packing Tube December 2015 This is information on a discontinued...