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STF15NM65N - N-channel Power MOSFET

Description

This series of devices implements the second generation of MDmesh™ Technology.

This revolutionary Power MOSFET associates a new vertical structure to the Company’s strip layout to yield one of the world’s lowest on-resistance and gate charge.

Features

  • www. DataSheet4U. com Type VDSS RDS(on) Max (@Tjmax) 710 V 710 V 710 V 710 V 710 V < 0.27 Ω < 0.27 Ω < 0.27 Ω < 0.27 Ω < 0.27 Ω ID 3 STB15NM65N STF15NM65N STI15NM65N STP15NM65N STW15NM65N 15.5 A 15.5 A(1) 15.5 A 15.5 A 15.5 A 1 2 3 12 TO-220 3 1 2 I²PAK TO-220FP 3 1 2 3 1. Limited only by maximum temperature allowed.
  • 100% avalanche tested Low input capacitance and gate charge Low gate input resistance D²PAK 1 TO-247 Figure 1. Internal schematic diagram Applicatio.

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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STF15NM65N-STI15NM65N-STW15NM65N STB15NM65N-STP15NM65N N-channel 650V - 0.25Ω - 15.5A - TO-220/FP - D2/I2PAK - TO-247 Second generation MDmesh™ Power MOSFET Features www.DataSheet4U.com Type VDSS RDS(on) Max (@Tjmax) 710 V 710 V 710 V 710 V 710 V < 0.27 Ω < 0.27 Ω < 0.27 Ω < 0.27 Ω < 0.27 Ω ID 3 STB15NM65N STF15NM65N STI15NM65N STP15NM65N STW15NM65N 15.5 A 15.5 A(1) 15.5 A 15.5 A 15.5 A 1 2 3 12 TO-220 3 1 2 I²PAK TO-220FP 3 1 2 3 1. Limited only by maximum temperature allowed ■ ■ ■ 100% avalanche tested Low input capacitance and gate charge Low gate input resistance D²PAK 1 TO-247 Figure 1. Internal schematic diagram Application ■ Switching applications Description This series of devices implements the second generation of MDmesh™ Technology.
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