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ST70136 - CPE ADSL ANALOG FRONT END

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DO VDDA VDDD VSSA VSSD Digital Output Analog Power Supply Digital Power Supply Analog Ground Digital Ground 3/24 ST70136 Table 1 : Pin Assignment (continued) Pins Name TQFP 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 LFBGA H7 G6 F5

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Datasheet Details

Part number ST70136
Manufacturer STMicroelectronics
File Size 361.33 KB
Description CPE ADSL ANALOG FRONT END
Datasheet download datasheet ST70136 Datasheet
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ST70136 CPE ADSL ANALOG FRONT END s WIDE TRANSMIT AND RECEIVE DYNAMIC s s s s s s s s s s s s RANGE TO REDUCE EXTERNAL FILTERING REQUIREMENTS RECEIVE PROGRAMMABLE GAIN: 0 TO 31dB GAIN IN 1dB STEPS RECEIVE PROGRAMMABLE ATTENUATOR 0,-4dB, -8dB, -12dB 12-BIT A/D CONVERTER IN RECEIVE PATH TRANSMIT PROGRAMMABLE GAIN: 0 TO -15dB IN 1dB STEPS 14-BIT D/A CONVERTER IN TRANSMIT PATH LOW POWER MODE: 10mW IN LISTENING MODE, 250µW IN POWER DOWN TONE DETECTOR: ACTIVITY DETECTION FOR WAKE-UP FUNCTION 64-PIN TQFP PACKAGE 64-PIN LFBGA PACKAGE 0.50µm, 5V BICMOS TECHNOLOGY 3.3V DIGITAL INTERFACE 5V ANALOG INTERFACE The AFE receive path contains a programmable gain amplifier (RxPGA), a low pass anti-aliasing filter, and a 12-bit A/D converter. The RxPGA is digitally programmable from 0 to 31dB in 1dB steps.
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