Description
language (BSDL) is available.
2) - 1 phases, that strobe will behave erroneously when back to back accesses occur.
Features
- s
Enhanced 32-bit CPU.
- 0 to 40 MHz processor clock.
- 32 MIPS at 40 MHz.
- fast integer/bit operations
s
System Services
32-bit Processor
16 Kbytes on-chip SRAM.
- 160 Mbytes/s maximum bandwidth
s
Programmable memory interface
Timers
OS-Link OS-Link
ST20 Bus.
- 4 separately configurable regions.
- 8/16/32-bits wide.
- support for mixed memory.
- 2 cycle external access.
- support for page mode DRAM
s
OS-Link OS-Link Even.