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SPC58NE84E7 - 32-bit Power Architecture microcontroller

Description

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3 2 Block diagram

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Features

  • Two 32-bit Power Architecture® VLE compliant CPU core (e200z4d), dual issue, one of them being paired in lockstep.
  • Single-precision floating point operations.
  • 8 kB I-Cache and 4 kB D-Cache.
  • 16 kB local instruction SRAM and 64 kB local data SRAM.
  • One 32-bit Power Architecture® VLE compliant CPU core (e200z4d), dual issue, paired in lockstep.
  • Single-precision floating point operations.
  • Lightweight Signal Processing Auxiliary Processing Unit (.

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SPC58NE84E7, SPC58NE84C3 32-bit Power Architecture® microcontroller for automotive ASIL-D applications Data brief - preliminary data LFBGA292 (17 x 17 x 1.7 mm) eLQFP176 (24 x 24 x 1.
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