M69KB096AA Datasheet Text
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64 Mbit (4M x16) 1.8V Supply, 80MHz Clock Rate, Burst PSRAM
Features
SUMMARY
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- SUPPLY VOLTAGE
- VCC = 1.7 to 1.95V core supply voltage
- VCCQ = 1.7 to 3.3V for I/O buffers ASYNCHRONOUS MODES
- Asynchronous Random Read: 70ns and 85ns access time
- Asynchronous Write
- Asynchronous Page Read Page Size: 16 words Subsequent read within page: 20ns SYNCHRONOUS BURST READ AND WRITE MODES
- Burst Write in Continuous Mode
- Burst Read: Fixed Length (4, 8, or 16 Words) or Continuous mde Maximum Clock Frequency: 66MHz, 80MHz Burst initial latency: 50ns (4 clock cycles) at 80MHz Output delay: 9ns at 80MHz BYTE CONTROL BY LB/UB LOW POWER CONSUMPTION
- Asynchronous Random Read Mode: < 25mA
- Asynchronus Page Read Mode (subsequent read operations): < 15mA
- Synchronous Burst Read Initial access: < 35mA Continuous Burst Read: < 15mA
- Standby Current: 120µA
- Deep Power-Down Current: 10µA (typ)
Figure 1. Package
Wafer
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LOW POWER Features
- Temperature pensated Refresh (TCR)
- Partial Array Refresh (PAR)
- Deep Power-Down (DPD) Mode OPERATING TEMPERATURE
- - 30°C to +85°C
THE M69KB096AA IS ONLY AVAILABLE AS PART OF A MULTI-CHIP PACKAGE PRODUCT
January 2006
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