LF256 Overview
These circuits are monolithic J-FET input operational amplifiers incorporating well matched, high voltage J-FET on the same chip with standard bipolar transistors. This amplifiers feature low input bias and offset currents, low input offset voltage and input offset voltage drift,coupledwith offsetadjust which doesnot degrade drift or mon-mode rejection. The devices are also designed for high slew rate, wide bandwidth,extremelyfastsettlingtime, lowvoltageand current noise and a low 1/f noise level. SCHEMATIC DIAGRAM V i o ADJUSTMENT
