SR5015-80 Datasheet, SMSC

D COPLAMOS® N Channel Silicon Gate Technology D Variable Length-Single Mask Programmable-1 to 134 bits D Directly TTL-compatible on all inputs, outputs, and clock D Clear.

D Memory Buffering D Unique Buffering Lengths D Terminals BLOCK DIAGRAM OUTPUT A OUTPUT C REC CONTROL ABC ~"""'--1 .

The SMC SR 5015-XXX is a quad static shift register family fabricated using SMC's COPLAMOS@ N channel silicon gate process which provides a higher functional density and speed on a monolithic chip than conventional MaS technology. The COPLAMOS® proce.