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uPD46184185B - 18M-BIT DDR II SRAM SEPARATE I/O 2-WORD BURST OPERATION

Download the uPD46184185B datasheet PDF. This datasheet also covers the uPD46184095B variant, as both devices belong to the same 18m-bit ddr ii sram separate i/o 2-word burst operation family and are provided as variant models within a single manufacturer datasheet.

Description

The μPD46184095B is a 2,097,152-word by 9-bit and the μPD46184185B is a 1,048,576-word by 18-bit synchronous double data rate static RAM fabricated with advanced CMOS technology using full CMOS six-transistor memory cell.

Features

  • 1.8 ± 0.1 V power supply.
  • 165-pin.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (uPD46184095B-Renesas.pdf) that lists specifications for multiple related part numbers.

Datasheet Details

Part number uPD46184185B
Manufacturer Renesas
File Size 546.72 KB
Description 18M-BIT DDR II SRAM SEPARATE I/O 2-WORD BURST OPERATION
Datasheet download datasheet uPD46184185B Datasheet

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Other Datasheets by Renesas

Part Number Description
uPD46184182B 18M-BIT DDR II SRAM 2-WORD BURST OPERATION
uPD46184184B 18M-BIT DDR II SRAM 4-WORD BURST OPERATION
uPD46184095B 18M-BIT DDR II SRAM SEPARATE I/O 2-WORD BURST OPERATION
uPD46184362B 18M-BIT DDR II SRAM 2-WORD BURST OPERATION
uPD46185084B 18M-BIT QDR II SRAM 4-WORD BURST OPERATION

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
μPD46184095B μPD46184185B Datasheet 18M-BIT DDR II SRAM SEPARATE I/O 2-WORD BURST OPERATION Description R10DS0115EJ0200 Rev.2.00 Nov 09, 2012 The μPD46184095B is a 2,097,152-word by 9-bit and the μPD46184185B is a 1,048,576-word by 18-bit synchronous double data rate static RAM fabricated with advanced CMOS technology using full CMOS six-transistor memory cell. The μPD46184095B and μPD46184185B integrate unique synchronous peripheral circuitry and a burst counter. All input registers controlled by an input clock pair (K and K#) are latched on the positive edge of K and K#. These products are suitable for application which require synchronous operation, high speed, low voltage, high density and wide bit configuration. These products are packaged in 165-pin PLASTIC BGA. Features • 1.
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