Description
The V103 LVDS display interface transmitter is primarily designed to support pixel data transmission between a video processing engine and a digital video display.
Features
- Pin compatible with THine THC63LVD103.
- Wide pixel clock range: 8 - 135 MHz.
- Supports a wide range of video and graphics modes
including VGA, SVGA, XGA, SXGA, SXGA+, NTSC, PAL, SDTV, and HDTV up to 1080I or 720P.
- Internal PLL requires no external loop filter.
- Selectable rising or falling clock edge for data
alignment.
- Compatible with Spread Spectrum clock source.
- Reduced LVDS output voltage swing mode
(selectable) to minimize EMI.
V103 Datasheet
