▪ UPN channel
* Generates clocks with 88fs RMS of jitter
* Generates 156.25MHz, with other frequencies available
* Four differential HCSL outputs ▪ Six DPLL/D.

with full timing support (FTS), partial timing support (PTS) and assisted partial timing support (APTS). Features ▪ UPN.

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 2. Overview of the ClockMatrix Family . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

RC32

RC32112A

RC3216

RC3216J100AS

RC3216J100BS

RC3216J100CS

RC3216J100ES

RC3225

RC32365

RC32434

RC32504A

RC32508A

RC3000C-T

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