Download the R5F51137ADFP datasheet PDF.
This datasheet also covers the R5F51138ADFP variant, as both devices belong to the same 32-bit mcu family and are provided as variant models within a single manufacturer datasheet.
Features
- 32-bit RX CPU core.
- 32 MHz maximum operating frequency Capable of 50 DMIPS when operating at 32 MHz.
- Accumulator handles 64-bit results (for a single instruction) from 32bit × 32-bit operations.
- Multiplication and division unit handles 32-bit × 32-bit operations (multiplication instructions take one CPU clock cycle).
- Fast interrupt.
- CISC Harvard architecture with five-stage pipeline.
- Variable-length instruction format, ultra-compact cod.
R5F51137ADFP Datasheet
