R5F2136CANFA Datasheet | Renesas

Overview 1.1 Features The R8C/36A Group of single-chip MCUs incorporate the R8C CPU core, employing sophisticated instructions for a high level of efficiency. With 1 Mbyte of address space, and it is capable of executing instructions at high speed. In addition, the CPU core boasts a multiplier for high-speed operation processing. Power consumption is low, and the supported operating modes allow additional power control. These MCUs are designed to maximize EMI/EMS performance. Integration of many peripheral functions, including multifunction timer and serial interface, reduces the number of system ponents. The R8C/36A Group have data flash (1 KB × 4 blocks) with the background operation (BGO) function. 1.1.1 Applications Electronic household appliances, office equipment, audio equipment, consumer equipment, etc. REJ03B0265-0110 Rev.1.10 Sep 28, 2009 Page 1 of 55 Under development Preliminary specification Specifications in this manual are tentative and subject to change. R8C/36A Group 1. Overview 1.1.2 Specifications Tables 1.1 and 1.2 outline the Specifications for R8C/36A Group. Table 1.1 Specifications for R8C/36A Group (1) Item CPU Function Central processing unit Memory ROM, RAM, Data flash Power Supply Voltage detection Voltage circuit Detection I/O Ports Programmable I/O ports Clock Clock generation circuits Interrupts Watchdog Timer DTC (Data Transfer Controller) Timer Timer RA Timer RB Timer RC Timer RD Specification R8C CPU core - Number of fundamental instructions: 89 - Minimum instruction execution time: 50 ns (f(XIN) = 20 MHz, VCC = 2.7 to 5.5 V) 200 ns (f(XIN) = 5 MHz, VCC = 1.8 to 5.5 V) - Multiplier: 16 bits × 16 bits → 32 bits - Multiply-accumulate instruction: 16 bits × 16 bits + 32 bits → 32 bits - Operation mode: Single-chip mode (address space: 1...