MK2049-34 Description
The MK2049-34 is a VCXO Phased Locked Loop (PLL) based clock synthesizer that accepts multiple input frequencies. With an 8 kHz clock input as a reference, the MK2049-34 generates T1, E1, T3, E3, ISDN, xDSL, and other munications frequencies. This allows for the generation of clocks frequency-locked and phase-locked to an 8 kHz backplane clock, simplifying clock synchronization in munications systems.
MK2049-34 Key Features
- Packaged in 20-pin SOIC
- 3.3 V + 5% operation
- Fixed I/O phase relationship on all selections
- Meets the TR62411, ETS300 011, and GR-1244
- Accepts multiple inputs: 8 kHz backplane clock, Loop
- Locks to 8 kHz + 100 ppm (External mode)
- Buffer Mode allows jitter attenuation of 10 to 36 MHz
- Exact internal ratios enable zero ppm error
- Output clock rates include T1, E1, T3, E3, ISDN, xDSL
- See also the MK2049-36 and MK2049-45