M5M5V5636UG-16 sram equivalent, 18874368-bit(524288-word by 36-bit) network sram.
* Fully registered inputs and outputs for pipelined operation
* Fast clock speed: 167 and 133 MHz
* Fast access time: 3.8 and 4.2 ns
* Single 3.3V -5% and.
The M5M5V5636UG is a family of 18M bit synchronous SRAMs organized as 524288-words by 36-bit. It is designed to eliminate dead bus cycles when turning the bus around between reads and writes, or writes and reads. Renesas's SRAMs are fabricated with h.
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