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IDT723666 - CMOS TRIPLE BUS SyncFIFO

Download the IDT723666 datasheet PDF. This datasheet also covers the IDT723656 variant, as both devices belong to the same cmos triple bus syncfifo family and are provided as variant models within a single manufacturer datasheet.

General Description

The IDT723656/723666/723676 is a monolithic, high-speed, low-power, CMOS Triple Bus synchronous (clocked) FIFO memory which supports clock frequencies up to 83 MHz and has read access times as fast as 8ns.

Key Features

  • Serial or parallel programming of partial flags.
  • Memory storage capacity: IDT723656.
  • 2,048 x 36 x 2.
  • Big- or Little-Endian format for word and byte bus sizes.
  • Loopback mode on Port A IDT723666.
  • 4,096 x 36 x 2.
  • Retransmit Capability IDT723676.
  • 8,192 x 36 x 2.
  • Master Reset clears data and configures FIFO, Partial Reset.
  • Clock frequencies up to 83 MHz (8ns access time).
  • Two independent FIFOs.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (IDT723656-Renesas.pdf) that lists specifications for multiple related part numbers.

Datasheet Details

Part number IDT723666
Manufacturer Renesas
File Size 762.17 KB
Description CMOS TRIPLE BUS SyncFIFO
Datasheet download datasheet IDT723666 Datasheet

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Other Datasheets by Renesas

Part Number Description
IDT723656 CMOS TRIPLE BUS SyncFIFO
IDT723676 CMOS TRIPLE BUS SyncFIFO
IDT7200 CMOS ASYNCHRONOUS FIFO
IDT7200L CMOS ASYNCHRONOUS FIFO
IDT7201 CMOS ASYNCHRONOUS FIFO

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
CMOS TRIPLE BUS SyncFIFOTM WITH BUS-MATCHING IDT723656 2,048 x 36 x 2 IDT723666 4,096 x 36 x 2 IDT723676 8,192 x 36 x 2 OBSOLETE PARTS FEATURES • Serial or parallel programming of partial flags • Memory storage capacity: IDT723656 – 2,048 x 36 x 2 • Big- or Little-Endian format for word and byte bus sizes • Loopback mode on Port A IDT723666 – 4,096 x 36 x 2 • Retransmit Capability IDT723676 – 8,192 x 36 x 2 • Master Reset clears data and configures FIFO, Partial Reset • Clock frequencies up to 83 MHz (8ns access time) • Two independent FIFOs buffer data between one bidirectional 36-bit port and two unidirectional 18-bit ports (Port C receives clears data but retains configuration settings • Mailbox bypass registers for each FIFO • Free-running CLKA, CLKB and CLKC may be asy