IDT723666 Datasheet PDF (CMOS TRIPLE BUS SyncFIFO)

IDT723666 - CMOS TRIPLE BUS SyncFIFO

This page provides the datasheet information for the IDT723666, a member of the IDT723656 CMOS TRIPLE BUS SyncFIFO family.

Description

The IDT723656/723666/723676 is a monolithic, high-speed, low-power, CMOS Triple Bus synchronous (clocked) FIFO memory which supports clock frequencies up to 83 MHz and has read access times as fast as 8ns.

Features

Serial or parallel programming of partial flags.
Memory storage capacity: IDT723656.
2,048 x 36 x 2.
Big- or Little-Endian format for word and byte bus sizes.
Loopback mode on Port A IDT723666.
4,096 x 36 x 2.
Retransmit Capability IDT723676.
8,192 x 36 x 2.
Master Reset clears data and configures FIFO, Partial Reset.
Clock frequencies up to 83 MHz (8ns access time).
Two independent FIFOs.

Datasheet Details

Part number	IDT723666
Manufacturer	Renesas
File Size	762.17 KB
Description	CMOS TRIPLE BUS SyncFIFO
Datasheet	IDT723666 Datasheet
Additional preview pages of the IDT723666 datasheet.

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Full PDF Text Transcription

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CMOS TRIPLE BUS SyncFIFOTM WITH BUS-MATCHING IDT723656 2,048 x 36 x 2 IDT723666 4,096 x 36 x 2 IDT723676 8,192 x 36 x 2 OBSOLETE PARTS FEATURES • Serial or parallel programming of partial flags • Memory storage capacity: IDT723656 – 2,048 x 36 x 2 • Big- or Little-Endian format for word and byte bus sizes • Loopback mode on Port A IDT723666 – 4,096 x 36 x 2 • Retransmit Capability IDT723676 – 8,192 x 36 x 2 • Master Reset clears data and configures FIFO, Partial Reset • Clock frequencies up to 83 MHz (8ns access time) • Two independent FIFOs buffer data between one bidirectional 36-bit port and two unidirectional 18-bit ports (Port C receives clears data but retains configuration settings • Mailbox bypass registers for each FIFO • Free-running CLKA, CLKB and CLKC may be asy

Published: Dec 13, 2021 |