IDT6167SA Datasheet | Renesas

Features - High-speed (equal access and cycle time) high reliability CMOS technology. - Military: 25/35/45/55/70/85/100ns (max.) Access times as fast as 15ns are available. The circuit also offers - mercial: 15/20/25ns (max.) a reduced power standby mode. When CS goes HIGH, the circuit - Low power consumption will automatically go to, and remain in, a standby mode as long as CS - Battery backup operation - 2V data retention voltage remains HIGH. This capability provides significant system-level power (IDT6167LA only) and cooling savings. The low-power (LA) version also offers a battery - Available in 20-pin CERDIP and Plastic DIP, and 20-pin SOJ backup data retention capability where the circuit typically consumes - Produced with advanced CMOS high-performance technology - CMOS process virtually eliminates alpha particle T R soft-error rates R O - Separate data input and output F - Military product pliant to MIL-STD-883, Class B PA D Description The l DT6167 is a 16,384-bit high-speed static RAM organized E E as 16K x 1. The part is fabricated using IDT’s high-performance, only 1µW operating off a 2V battery. All inputs and the output of the IDT6167 are TTL-patible and operate from a single 5V supply, thus simplifying system designs. The IDT6167 is packaged in a space-saving 20-pin, 300 mil Plastic DIP or CERDIP and a Plastic 20-pin providing high board-level packing densities. Military grade product is manufactured in pliance with the latest revision of MIL-STD-883, Class B, making it ideally suited to military temperature applications demanding the highest level of performance and reliability. ET ND S Functional Block Diagram OL ME IGN A0 OBS DES ADDRESS E DECODE 16,384-BIT MEMORY ARRAY VCC GND NOT R NEW A13 I/O CONTROL , DOUT CS CONTROL LOGIC 2981 drw 01 ©2000 Integrated Device Technology, Inc. FEBRUARY 2001 DSC-2981/08 IDT6167SA/LA CMOS Static RAM 16K (16K x 1-Bit) Pin Configurations A0 A1 A2 A3 A4 A5 A6 DOUT WE...