ICS85214I Overview
The ICS85214I is a low skew, high performance 1-to-5 Differential-to-HSTL Fanout Buffer.The CLK0, nCLK0 pair can accept most standard differential input levels. The single ended CLK1 input accepts LVCMOS or LVTTL input levels. Guaranteed output and part to part skew characteristics make the ICS85214I ideal for those clock distribution applications demanding well defined performance and repeatability.
ICS85214I Key Features
- Five differential HSTL patible outputs
- Selectable differential CLK0, nCLK0 or LVCMOS/LVTTL clock inputs
- CLK0, nCLK0 pair can accept the following differential input levels: LVDS, LVPECL, HSTL, HCSL
- CLK1 can accept the following input levels: LVCMOS or LVTTL
- Output frequency up to 700MHz
- Translates any single ended input signal to HSTL levels with resistor bias on nCLK0 input
- Output skew: 40ps (maximum)
- Part-to-part skew: 300ps (maximum)
- Propagation delay: 1.8ns (maximum)
- 3.3V core, 1.8V output operating supply