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ICS542 - CLOCK DIVIDER

Datasheet Details

Part number ICS542
Manufacturer Renesas
File Size 298.66 KB
Description CLOCK DIVIDER
Datasheet download datasheet ICS542 Datasheet

General Description

The ICS542 is cost effective way to produce a high-quality clock output divided from a clock input.

The chip accepts a clock input up to 156 MHz at 3.3 V and produces a divide by 2, 4, 6, 8, 12, or 16 of the input clock.

There are two outputs on the chip, one being a low-skew divide by two of the other.

Overview

CLOCK DIVIDER DATASHEET ICS542.

Key Features

  • 8-pin SOIC package, Pb free.
  • Available in RoHS compliant package.
  • IDT’s lowest cost clock divider.
  • Low skew (500 ps) outputs. One is /2 of the other.
  • Easy to use with other generators and buffers.
  • Input clock frequency up to 156 MHz.
  • Output clock duty cycle of 45/55.
  • Power-down turns off chip.
  • Output Enable.
  • Advanced, low-power CMOS process.
  • Operating voltage of 3.3 V or 5 V.
  • Does not deg.