ICS527-02 buffer equivalent, clock slicer user configurable pecl input zero delay buffer.
* Packaged as 28-pin SSOP, Pb-free (150 mil body)
* Synchronizes fractional clocks rising edges
* PECL IN to CMOS OUT
* Pin selectable dividers
* Zero.
The ICS527-02 Clock Slicer is the most flexible way to generate a CMOS output clock from a PECL input clock with zero skew. The user can easily configure the device to produce nearly any output clock that is multiplied or divided from the input clock.
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