ICS180-51 Description
The ICS180-51 generates a low EMI output clock from a clock or crystal input. The device uses IDT’s proprietary mix of analog and digital Phase-Locked Loop (PLL) technology to spread the frequency spectrum of the output, thereby reducing the frequency amplitude peaks by several dB. The ICS180-51 offers center spread selection of +/-0.625% and +/-1.875%.
ICS180-51 Key Features
- Pin and function patible to Cypress W180-51
- Packaged in 8-pin SOIC
- Provides a spread spectrum output clock
- Accepts a clock input and provides same frequency
- Input frequency of 8 to 28 MHz
- Peak reduction by 7dB
- 14dB typical on 3rd
- Spread percentage selection for +/-0.625% and
- Operating voltage of 3.3 V and 5 V
- Advanced, low-power CMOS process