HD74SSTV16857B buffer equivalent, 1:1 14-bit sstl_2 registered buffer.
* Supports LVCMOS reset (RESET) input / SSTL_2 data (D) inputs and CLK input
* Differential SSTL_2 (Stub series terminated logic) CLK signal
* Flow through ar.
The HD74SSTV16857B is a 14-bit registered buffer designed for 2.3 V to 2.7 V Vcc operation and LVCMOS reset (RESET) input / SSTL_2 data (D) inputs and CLK input.
Data flow from D to Q is controlled by differential clock pins (CLK, CLK) and the RESE.
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