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HD74LVC533 - Octal D-type Transparent Latches

Datasheet Summary

Description

The HD74LVC533 has eight D type latches with three state outputs in a 20 pin package.

When the latch enable input is high, the Q outputs will follow the D inputs.

When the latch enable goes low, data at the D inputs will be retained at the outputs until latch enable returns high again.

Features

  • VCC = 2.0 V to 5.5 V.
  • All inputs VIH (Max. ) = 5.5 V (@VCC = 0 V to 5.5 V).
  • Typical VOL ground bounce < 0.8 V (@VCC = 3.3 V, Ta = 25°C).
  • Typical V.

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Datasheet preview – HD74LVC533

Datasheet Details

Part number HD74LVC533
Manufacturer Renesas
File Size 194.65 KB
Description Octal D-type Transparent Latches
Datasheet download datasheet HD74LVC533 Datasheet
Additional preview pages of the HD74LVC533 datasheet.

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Full PDF Text Transcription

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HD74LVC533 Octal D-type Transparent Latches with 3-state Outputs REJ03D0356–0400Z (Previous ADE-205-070B (Z)) Rev.4.00 Jul. 27, 2004 Description The HD74LVC533 has eight D type latches with three state outputs in a 20 pin package. When the latch enable input is high, the Q outputs will follow the D inputs. When the latch enable goes low, data at the D inputs will be retained at the outputs until latch enable returns high again. When a high logic level is applied to the output control input, all outputs go to a high impedance state, regardless of what signals are present at the other inputs and the state of the storage elements.
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