HD74HC73 - Dual J-K Flip-Flops

Renesas

Datasheet Details

The flip-flop is edge sensitive to the clock input and change state on the negative going transition of the clock pulse.

Each flip-flop has independent, J, K, clock, and clear inputs and Q and Q outputs.

Clear is independent of the clock and accomplished by a low level on the input.

HD74HC73 Dual J-K Flip-Flops (with Clear) REJ03D0548-0200 (Previous ADE-205-420) Rev.2.

High Speed Operation: tpd (Clock to Q) = 18 ns typ (CL = 50 pF).
High Output Current: Fanout of 10 LSTTL Loads.
Wide Operating Voltage: VCC = 2 to 6 V.
Low Input Current: 1 µA max.
Low Quiescent Supply Current: ICC (static) = 2 µA max (Ta = 25°C).
Ordering Information Part Name Package Type Package Code (Previous Code) Package Abbreviation HD74HC73P DILP-14 pin PRDP0014AB-B (DP-14AV) P HD74HC73FPEL SOP-14 pin (JEITA) PRSP0014DF-B.

Brand Logo	Part Number	Description	Manufacturer
	HD74HC73	Dual J-K Flip-Flops (with Clear)	Hitachi Semiconductor