HD74HC273 Datasheet, Renesas

* High Speed Operation: tpd (Clock to Q) = 18 ns typ (CL = 50 pF)
* High Output Current: Fanout of 10 LSTTL Loads
* Wide Operating Voltage: VCC = 2 to 6 V

such as the development of weapons of mass destruction or for the purpose of any other military use. When exporting the .

This device contains 8 master-slave flip-flops with a common clock and common clear. Data on the D input having the specified setup and hold times is transferred to the Q output on the low to high transition of the clock input. The clear input when l.