HD74HC240 receivers equivalent, octal buffers/line drivers/line receivers.
* High Speed Operation: tpd = 10 ns typ (CL = 50 pF)
* High Output Current: Fanout of 15 LSTTL Loads
* Wide Operating Voltage: VCC = 2 to 6 V
* Low Inpu.
The HD74HC240 is an inverting buffer and has two active low enables (1G and 2G). Each enable independently controls 4 buffers. This device does not have schmitt trigger inputs.
Features
* High Speed Operation: tpd = 10 ns typ (CL = 50 pF)
*.
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