HD74HC174 Overview
This device contains 6 master-slave flip-flops with a mon clock and mon clear. Data on the D input having the specified setup and hold times is transferred to the Q output on the low to high transition of the clock input. The clear input when low, sets all outputs to a low state.
HD74HC174 Key Features
- High Speed Operation: tpd (Clock to Q) = 15 ns typ (CL = 50 pF)
- High Output Current: Fanout of 10 LSTTL Loads
- Wide Operating Voltage: VCC = 2 to 6 V
- Low Input Current: 1 µA max
- Low Quiescent Supply Current: ICC (static) = 4 µA max (Ta = 25°C)
- Ordering Information
- EL (2,000 pcs/reel)
