Download the CD4022BMS datasheet PDF.
This datasheet also covers the CD4017BMS variant, as both devices belong to the same cmos counter/dividers family and are provided as variant models within a single manufacturer datasheet.
General Description
of ‘B’ Series CMOS Devices”
Applications
Decade Counter/Decimal Decode Display (CD4017BMS)
Binary Counter/Decoder
Frequency Division
Counter Control/Timers
Divide-by-N Counting
For Further Application Information, See ICAN-6166 “COS/MOS MSI
Key Features
High Voltage Types (20V Rating).
Fully Static Operation.
Medium-Speed Operation 10MHz (Typ) at VDD = 10V.
Standardized Symmetrical Output Characteristics.
100% Tested for Quiescent Current at 20V.
5V, 10V and 15V Parametric Ratings.
Meets All Requirements of JEDEC Tentative Standard Number 13A, “Standard Specifications for.
Full PDF Text Transcription for CD4022BMS (Reference)
Note: Below is a high-fidelity text extraction (approx. 800 characters) for
CD4022BMS. For precise diagrams, and layout, please refer to the original PDF.
CD4017BMS, CD4022BMS CMOS Counter/Dividers CD4017BMS - Decade Counter with 10 Decoded Outputs CD4022BMS - Octal Counter with 8 Decoded Outputs CD4017BMS and CD4022BMS are...
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BMS - Octal Counter with 8 Decoded Outputs CD4017BMS and CD4022BMS are 5-stage and 4-stage Johnson counters having 10 and 8 decoded outputs, respectively. Inputs include a CLOCK, a RESET, and a CLOCK INHIBIT signal. Schmitt trigger action in the CLOCK input circuit provides pulse shaping that allows unlimited clock input pulse rise and fall times. These counters are advanced one count at the positive clock signal transition if the CLOCK INHIBIT signal is low. Counter advancement via the clock line is inhibited when the CLOCK INHIBIT signal is high. A high RESET signal clears the counter to its zero count.
CD4022BMS Datasheet
