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9ZML1245 - 2:12 Clock Multiplexer

Datasheet Summary

Description

The 9ZML1245/9ZML1255/9ZML1256 devices are third generation enhanced performance 2-input, 12-output clock multiplexers.

Each input clock has software adjustable input-to-output delay when operating in Zero-Delay (ZDB) mode.

Features

  • ensuring that clocks are well behaved with today's ever more complex power-up sequencing. The 9ZML1256 has an SMBus Write Lockout pin for increased device and system security. PCIe Clocking Architectures.
  • Common Clocked (CC).
  • Independent Reference (IR) with and without spread spectrum Key Specifications.
  • Fanout Buffer Mode additive phase jitter:.
  • PCIe Gen5 CC < 15fs RMS.
  • DB2000Q additive jitter < 25fs RMS.
  • QPI/UPI 11.4GB/s < 40fs RMS.
  • IF-UPI add.

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Datasheet preview – 9ZML1245

Datasheet Details

Part number 9ZML1245
Manufacturer Renesas
File Size 778.55 KB
Description 2:12 Clock Multiplexer
Datasheet download datasheet 9ZML1245 Datasheet
Additional preview pages of the 9ZML1245 datasheet.

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Full PDF Text Transcription

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2:12 Clock Multiplexer for PCIe Gen1–5 and UPI 9ZML1245/9ZML1255/ 9ZML1256 Datasheet Description The 9ZML1245/9ZML1255/9ZML1256 devices are third generation enhanced performance 2-input, 12-output clock multiplexers. Each input clock has software adjustable input-to-output delay when operating in Zero-Delay (ZDB) mode. The devices also implement an extensive set of features ensuring that clocks are well behaved with today's ever more complex power-up sequencing. The 9ZML1256 has an SMBus Write Lockout pin for increased device and system security.
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