9DBV0641 buffer equivalent, 6-output 1.8v pcie zero-delay/fanout clock buffer.
* Six 1
–200 MHz Low-Power (LP) HCSL DIF pairs with
Zo = 100
Key Specifications
* DIF cycle-to-cycle jitter < 50ps
* DIF output-to-output skew.
The 9DBV0641 is a member of Renesas’ 1.8V Very-Low-Power (VLP) PCIe family. It has integrated output terminations providing Zo = 100 for direct connection to 100 transmission lines. The device has 6 output enables for clock management and 3 selecta.
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