8V31012 Datasheet, Renesas

* Twelve differential HCSL outputs
* Translates any differential input signal (LVPECL, LVHSTL, LVDS, HCSL) to HCSL levels without external bias networks
* Max.

Features
* Twelve differential HCSL outputs
* Translates any differential input signal (LVPECL, LVHSTL, LVDS, .

The 8V31012 is a 1-to-12 Differential HCSL Fanout Buffer. The 8V31012 is designed to translate any differential signal levels to differential HCSL output levels. An external reference resistor is used to set the value of the current supplied to an ex.