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8S89831I - Differential LVPECL-To-LVPECL/ECL Fanout Buffer

Datasheet Summary

Description

The 8S89831I is a high speed 1-to-4 Differential- to-LVPECL/ECL Fanout Buffer.

The 8S89831I is optimized for high speed and very low output skew, making it suitable for use in demanding applications such as SONET, 1 Gigabit and 10 Gigabit Ethernet, and Fiber Channel.

Features

  • Four LVPECL/ECL outputs.
  • IN, nIN input can accept the following differential input levels: LVPECL, LVDS, CML, SSTL.
  • 50 internal input termination to VT.
  • Output frequency: >2.1GHz.
  • Output skew: 30ps (maximum).
  • Part-to-part skew: 185ps (maximum).
  • Additive phase jitter, RMS: 0.31ps (typical).
  • Propagation Delay: 570ps (maximum).
  • LVPECL mode operating voltage supply range: VCC = 2.5V±5%, 3.3V±5%, VEE = 0V.
  • ECL.

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Datasheet preview – 8S89831I

Datasheet Details

Part number 8S89831I
Manufacturer Renesas
File Size 625.67 KB
Description Differential LVPECL-To-LVPECL/ECL Fanout Buffer
Datasheet download datasheet 8S89831I Datasheet
Additional preview pages of the 8S89831I datasheet.

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Full PDF Text Transcription

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Differential LVPECL-To-LVPECL/ECL Fanout Buffer 8S89831I Datasheet Description The 8S89831I is a high speed 1-to-4 Differential- to-LVPECL/ECL Fanout Buffer. The 8S89831I is optimized for high speed and very low output skew, making it suitable for use in demanding applications such as SONET, 1 Gigabit and 10 Gigabit Ethernet, and Fiber Channel. The internally terminated differential input and VREF_AC pin allow other differential signal families such as LVDS, LVHSTL and CML to be easily interfaced to the input with minimal use of external components. The device also has an output enable pin which may be useful for system test and debug purposes. The 8S89831I is packaged in a small 3mm x 3mm 16-pin VFQFN package which makes it ideal for use in space-constrained applications.
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