854S057 multiplexer equivalent, 4:1 or 2:1 lvds clock multiplexer.
* High speed differential multiplexer. The device can be configured
as either a 4:1 or 2:1 multiplexer
* One LVDS output pair
* Four selectable PCLK, nPCLK in.
The select pins have internal pulldown resistors. Leaving one input unconnected (pulled to logic low by the internal re.
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