Datasheet Details
| Part number | 854S057 |
|---|---|
| Manufacturer | Renesas |
| File Size | 451.34 KB |
| Description | 4:1 or 2:1 LVDS Clock Multiplexer |
| Datasheet |
 854S057 Datasheet
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General Description
The 854S057 is a 4:1 or 2:1 LVDS Clock Multiplexer which can operate up to 2GHz.
The PCLK, nPCLK pairs can accept most standard differential input levels.
Internal termination is provided on each differential input pair.
Key Features
- High speed differential multiplexer. The device can be configured as either a 4:1 or 2:1 multiplexer.
- One LVDS output pair.
- Four selectable PCLK, nPCLK inputs with internal termination.
- PCLKx, nPCLKx pairs can accept the following differential input levels: LVPECL, LVDS, CML, SSTL.
- Maximum output frequency: 2GHz.
- Part-to-part skew: 200ps (maximum).
- Propagation delay: 650ps (maximum).
- Additive phase jitter, RMS: 0.047ps (typ.