Part 8413S12B
Description HCSL/ LVCMOS Clock Generator
Manufacturer Renesas
Size 0.99 MB
Renesas
8413S12B

Overview

The 8413S12B is a PLL-based clock generator. This high performance device is optimized to generate the processor core reference clock, the PCI-Express, sRIO, XAUI, SerDes reference clocks and the clocks for both the Gigabit Ethernet MAC and PHY.

  • Ten selectable 100MHz, 125MHz, 156.25MHz and 312.5MHz clocks for PCI Express, sRIO and GbE, HCSL interface levels
  • One single-ended QG LVCMOS/LVTTL clock output at 125MHz
  • One single-ended QF LVCMOS/LVTTL clock output at 50MHz, 15 output impedance
  • Two single-ended QREFx LVCMOS/LVTTL outputs at 25MHz, 15 output impedance
  • Selectable external crystal or differential (single-ended) input source
  • Crystal oscillator interface designed for 25MHz, parallel resonant crystal
  • Differential CLK, nCLK input pair that can accept: LVPECL, LVDS,