74HC76 flop equivalent, dual j-k flip flop.
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* High Speed Operation: tpd (Clock to Q) = 21 ns typ (CL = 50 pF) High Output Current: Fanout of 10 LSTTL Loads Wide Operating Voltage: VCC = .
Each flip-flop has independent J, K, preset, clear, and clock inputs and Q and Q outputs. This device is edge sensitive to the clock input and change state on the negative going transition of the clock pulse. Clear www.DataSheet4U.com and preset are .
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