HYB25DC256163CE-5 sgram equivalent, 256-mbit double-data-rate sgram.
of the product family HYB25DC256163CE and the ordering information.
1.1 Features
* Double data rate architecture: two data transfers per clock cycle
* Bidirectio.
The 256-Mbit Double-Data-Rate SGRAM is a high-speed CMOS, dynamic random-access memory containing 268,435,456 bits. It is internally configured as a quad-bank DRAM.
The 256-Mbit Double-Data-Rate SGRAM uses a double-data-rate architecture to achieve .
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