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HYB18TC1G160AF Datasheet

1-gbit Ddr2 Sdram

Manufacturer: Qimonda

Datasheet Details

Part number HYB18TC1G160AF
Manufacturer Qimonda
File Size 3.01 MB
Description 1-Gbit DDR2 SDRAM
Datasheet HYB18TC1G160AF_Qimonda.pdf

HYB18TC1G160AF Overview

1.11 Page All All 102 Subjects (major changes since last revision) Qimonda update Adapted internet edition Modified AC Timing Parameters Added more speedsorts: HYB18TC1G800AF-5, HYB18TC1G800AF-3.7, HYB18TC1G800AF-3S, HYB18TC1G160AF-5, HYB18TC1G160AF-3.7, HYB18TC1G160AF-3S Previous Revision: 1.1 We Listen to Your ments Any information within this document that you feel is wrong, unclear or missing at all?

HYB18TC1G160AF Key Features

  • Off-Chip-Driver impedance adjustment (OCD) and On- 1.8 V ± 0.1 V Power Supply 1.8 V ± 0.1 V (SSTL_18) patible I/O Die-Te
  • DRAM organizations with 8, 16 data in/outputs
  • Auto-Precharge operation for read and write bursts
  • Auto-Refresh, Self-Refresh and power saving PowerDown modes clock cycle four internal banks for concurrent operation
  • Average Refresh Period 7.8 µs at a TCASE lower than
  • Burst Length: 4 and 8
  • Programmable self refresh rate via EMRS2 setting
  • Differential clock inputs (CK and CK)
  • DCC enabling via EMRS2 setting
  • Bi-directional, differential data strobes (DQS and DQS) are transmitted / received with data. Edge aligned with read

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HYB18TC1G160AF Distributor