HYB18T512800BC sdram equivalent, 512-mbit double-data-rate-two sdram.
The 512-Mbit Double-Data-Rate-Two SDRAM offers the following key features:
* Off-Chip-Driver impedance adjustment (OCD) and On
* 1.8 V ± 0.1 V Power Supply 1.8 V .
See Table 1 for performance figures. The device is designed to comply with all DDR2 DRAM key features: 1. Posted CAS wi.
latched at the cross point of differential clocks (CK rising and CK falling). All I/Os are synchronized with a single ended DQS or differential DQS-DQS pair in a source synchronous fashion. A 16-bit address bus for ×4 and ×8 organized components and .
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