HYB18T256800BFL sdram equivalent, 256-mbit double-data-rate-two sdram.
The 256-Mbit Double-Data-Rate-Two SDRAM offers the following key features:
* Off-Chip-Driver impedance adjustment (OCD) and
* 1.8 V ± 0.1 V Power Supply 1.8 V ± .
See Table 1 for performance figures. The device is designed to comply with all DDR2 DRAM key features:
* Posted CAS.
All of the control and address inputs are synchronized with a pair of externally supplied differential clocks. Inputs are latched at the cross point of differential clocks (CK rising and CK falling). All I/Os are synchronized with a single ended DQS .
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