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P4C1023L - LOW POWER 128K x 8 SINGLE CHIP ENABLE CMOS STATIC RAM

Download the P4C1023L datasheet PDF. This datasheet also covers the P4C1023 variant, as both devices belong to the same low power 128k x 8 single chip enable cmos static ram family and are provided as variant models within a single manufacturer datasheet.

Description

The P4C1023L is a 1 Megabit low power CMOS static RAM organized as 128K x 8.

The CMOS memory requires no clocks or refreshing, and has equal access and cycle times.

Inputs are fully TTL-compatible.

Features

  • VCC Current.
  • Operating: 35mA.
  • CMOS Standby: 100µA Access Times.
  • 55/70 ns Single 5 Volts ±10% Power Supply www. DataSheet4U. com Easy Memory Expansion Using CE and OE Inputs Common Data I/O Three-State Outputs Fully TTL Compatible Inputs and Outputs Advanced CMOS Technology Automatic Power Down Packages.
  • 32-Pin 400 or 600 mil Ceramic DIP.
  • 32-Pin Ceramic SOJ.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (P4C1023_PyramidSemiconductor.pdf) that lists specifications for multiple related part numbers.

Datasheet Details

Part number P4C1023L
Manufacturer Pyramid Semiconductor
File Size 373.56 KB
Description LOW POWER 128K x 8 SINGLE CHIP ENABLE CMOS STATIC RAM
Datasheet download datasheet P4C1023L Datasheet

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
P4C1023/P4C1023L LOW POWER 128K x 8 SINGLE CHIP ENABLE CMOS STATIC RAM FEATURES VCC Current — Operating: 35mA — CMOS Standby: 100µA Access Times —55/70 ns Single 5 Volts ±10% Power Supply www.DataSheet4U.com Easy Memory Expansion Using CE and OE Inputs Common Data I/O Three-State Outputs Fully TTL Compatible Inputs and Outputs Advanced CMOS Technology Automatic Power Down Packages —32-Pin 400 or 600 mil Ceramic DIP —32-Pin Ceramic SOJ DESCRIPTION The P4C1023L is a 1 Megabit low power CMOS static RAM organized as 128K x 8. The CMOS memory requires no clocks or refreshing, and has equal access and cycle times. Inputs are fully TTL-compatible. The RAM operates from a single 5V±10% tolerance power supply. Access times of 55 ns and 70 ns are availale.
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