PCS3P623Z05B Datasheet PDF (Timing-Safe Peak EMI reduction IC) | Download PulseCore Semiconductor PCS3P623Z05B

PCS3P623Z05B - Timing-Safe Peak EMI reduction IC

Download the PCS3P623Z05B datasheet PDF (PCS3P623Z05A included). The manufacturer datasheet provides complete specifications, pinout details, electrical characteristics, and typical applications for timing-safe peak emi reduction ic.

Description

memory interface systems.

Features

Clock distribution with Timing-Safe™ Peak EMI Reduction Input frequency range: 20MHz - 50MHz Multiple low skew Timing-safe™ Outputs: PCS3P623Z05: 5 Outputs PCS3P623Z09: 9 Outputs.
External Input-Output Delay Control option Supply Voltage: 3.3V±0.3V Commercial and Industrial temperature range Packaging Information: ASM3P623Z05: 8 pin SOIC, and TSSOP ASM3P623Z09:16 pin SOIC, and TSSOP.
True Drop-in Solution for Zero Dela.

Datasheet Details

Part number	PCS3P623Z05B
Manufacturer	PulseCore Semiconductor
File Size	580.80 KB
Description	Timing-Safe Peak EMI reduction IC
Datasheet	PCS3P623Z05B Datasheet

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Full PDF Text Transcription

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May 2008 rev 0.1 Timing-Safe™ Peak EMI reduction IC PCS3P623Z05A/B PCS3P623Z09A/B www.DataSheet4U.com General Features • • • Clock distribution with Timing-Safe™ Peak EMI Reduction Input frequency range: 20MHz - 50MHz Multiple low skew Timing-safe™ Outputs: PCS3P623Z05: 5 Outputs PCS3P623Z09: 9 Outputs • • • • External Input-Output Delay Control option Supply Voltage: 3.3V±0.3V Commercial and Industrial temperature range Packaging Information: ASM3P623Z05: 8 pin SOIC, and TSSOP ASM3P623Z09:16 pin SOIC, and TSSOP • True Drop-in Solution for Zero Delay Buffer, ASM5P2305A / 09A designed to distribute Timing-Safe™ clocks with Peak EMI reduction. PCS3P623Z05 is an eight-pin version, accepts one reference input and drives out five low-skew TimingSafe™ clocks.

Published: Feb 16, 2011 |