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PulseCore Semiconductor

PCS1P2192A Datasheet Preview

PCS1P2192A Datasheet

VDP Multiple Pixel Clock Generator

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June 2009
rev 1.0
VDP Multiple Pixel Clock Generator
PCS1P2192A
Features
Generates multiple clock outputs from 20MHz
external reference clock
Input frequency: 20MHz
Output frequencies:
Selectable CLKOUT:
108MHz, 27MHz, 33.2MHz, 85MHz, 65MHz,
25MHz, 45MHz, and 40MHz
REFOUT: 20MHz
Operating Supply Voltage: 3.3V ± 0.3V
Zero ppm frequency synthesis error on all clock
outputs
Commercial temperature: 0°C to +85°C
8-pin SOIC package
Product Description
The PCS1P2192A is a clock generator that generates
multiple selectable pixel clock outputs for Video Display
Panel applications from an external 20MHz reference
clock. The PLL based clock generator is specifically
designed to provide zero ppm frequency synthesis error
on all clock outputs. Various pixel clock rates are
selectable through frequency selection pins S[2:0] (Refer
Frequency Selection Table) The device provides a
reference clock output additionally. Operating Supply
Voltage for this device is 3.3V± 0.3V. The device is
available in an 8 pin SOIC package, in commercial
temperature grade.
Applications
PCS1P2192A is targeted towards Video Display Panel
(VDP) applications like VGA, SVGA, XGA, WXGA,
UXGA.
Block Diagram
VDD [S2: S0]
CLKIN
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PLL
GND
CLKOUT
REFOUT
PulseCore Semiconductor Corporation
2105 S. Bascom Ave Suite 210, Campbell, CA 95008 Tel: 408-879-9077 Fax: 408-879-9018
www.pulsecoresemi.com
Notice: The information in this document is subject to change without notice.




PulseCore Semiconductor

PCS1P2192A Datasheet Preview

PCS1P2192A Datasheet

VDP Multiple Pixel Clock Generator

No Preview Available !

June 2009
rev 1.0
Pin Configuration
PCS1P2192A
CLKIN 1
GND 2
S0 3
S1 4
PCS1P2192A
8 VDD
7 CLKOUT
6 REFOUT
5 S2
Pin Description
Pin#
1
2
3
Pin Name
CLKIN
GND
S0
4 S1
5 S2
6 REFOUT
7 CLKOUT
8 VDD
Type
I
P
I
I
I
O
O
P
Description
20MHz external reference clock input.
Ground Connection.
Frequency select. Digital logic input used to select output frequency. Has an internal
pull up resistor. (Refer Frequency Selection Table)
Frequency select. Digital logic input used to select output frequency. Has an internal
pull up resistor. (Refer Frequency Selection Table)
Frequency select. Digital logic input used to select output frequency. Has an internal
pull up resistor. (Refer Frequency Selection Table)
Reference clock output
Clock output
Device Power Supply
Frequency Selection Table
S2
0
0
0
0
1
1
1
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S1
0
0
1
1
0
0
1
1
S0
0
1
0
1
0
1
0
1
CLKOUT (MHz)
108
27
33.2
85
65
25
45
40
VDP Multiple Pixel Clock Generator
Notice: The information in this document is subject to change without notice.
2 of 8


Part Number PCS1P2192A
Description VDP Multiple Pixel Clock Generator
Maker PulseCore Semiconductor
PDF Download

PCS1P2192A Datasheet PDF






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