PSMN005-25D Datasheet | Philips Semiconductors

FEATURES - ’Trench’ technology - Very low on-state resistance - Fast switching - Logic level patible g QUICK REFERENCE DATA SYMBOL d VDSS = 25 V ID = 75 A RDS(ON) ≤ 5.8 mΩ (VGS = 10 V) RDS(ON) ≤ 7.5 mΩ (VGS = 5 V) s GENERAL DESCRIPTION Silicon MAX products use the latest Philips Trench technology to achieve the lowest possible on-state resistance in each package at each voltage rating. Applications:- d.c. to d.c. converters - switched mode power supplies The PSMN005-25D is supplied in the SOT428 (Dpak) surface mounting package. PINNING PIN 1 2 3 tab gate drain1 source DESCRIPTION SOT428 (DPAK) tab 2 drain LIMITING VALUES Limiting values in accordance with the Absolute Maximum System (IEC 134) SYMBOL PARAMETER VDSS VDGR VGS VGSM ID IDM PD Tj, Tstg Drain-source voltage Drain-gate voltage Continuous gate-source voltage Peak pulsed gate-source voltage Continuous drain current Pulsed drain current Total power dissipation Operating junction and storage temperature CONDITIONS Tj = 25 ˚C to 175˚C Tj = 25 ˚C to 175˚C; RGS = 20 kΩ Tj ≤ 150 ˚C Tmb = 25 ˚C; VGS = 5 V Tmb = 100 ˚C; VGS = 5 V Tmb = 25 ˚C Tmb = 25 ˚C MIN. - 55 MAX. 25 25 ± 15 ± 20 752 70 240 125 175 UNIT V V V V A A A W ˚C 1 It is not possible to make connection to pin 2 of the SOT428 package. 2 Continuous current rating limited by package. October 1999 1 Rev 1.100 Philips Semiconductors Product specification N-channel logic level Trench MOS™ transistor AVALANCHE ENERGY LIMITING VALUES Limiting values in accordance with the Absolute Maximum System (IEC 134) SYMBOL PARAMETER EAS IAS Non-repetitive avalanche energy Non-repetitive avalanche current CONDITIONS Unclamped inductive load, IAS = 75 A; tp = 100 µs; Tj prior to avalanche = 25˚C; VDD ≤ 15 V; RGS = 50 Ω; VGS = 5 V MIN. - PSMN005-25D MAX. 120 75 UNIT m J A THERMAL RESISTANCES SYMBOL PARAMETER Rth j-mb Rth j-a Thermal resistance junction to mounting base Thermal resistance junction to ambient CONDITIONS MIN. SOT428 package, pcb...